1. Field of the Invention
This invention relates to a semiconductor memory device with electrically rewritable and non-volatile memory cells, and more particularly relates to an EEPROM (Electrically Erasable and Programmable ROMs) with NAND cell units formed on a partial SOI substrate.
2. Description of the Related Art
A NAND-type flash memory is known as one of EEPROMs. The NAND-type flash memory has a unit cell area smaller than that of a NOR-type flash memory, and is easy to make the capacity large because a plurality of electrically rewritable and non-volatile memory cells are connected in series to constitute a NAND cell unit.
Since the NAND-type flash memory uses FN tunneling current for writing data, the consumption current is smaller than that of the NOR-type flash memory, which uses hot carrier injection. Therefore, a page capacity being defined by a cell area, in which data write is performed at a time, it is possible to make the page capacity large, thereby being possible to write data at a substantially high rate.
To make the cell size of the NAND-type flash memory further smaller than that of the currently used cells, it is in need of making the device insulating area small. However, it leads to reduction of the breakdown voltage between cells. To achieve the miniaturization of cells without reducing the breakdown voltage, it is effective to use such a technology that forms the NAND cell unit array on an SOI (Silicon On Insulator) substrate. Such a technology has already been provided (e.g., refer to Unexamined Japanese Patent Application Publication No. 2000-174241).